Windows Dialog Application - RDS generator

An initial requirements specification

A self contained circuit that generates the generates RDS unique ID, PS, PTY and a simple Radio Text capability.

A PIC will synthesise a base band signal that will be applied to a balanced modulator

57 kHz clock is required for the modulator.

An initial implementation specification

PIC based 16F84-20

A windows dialog based app will have 4 fields:

The field entries will be "sticky", stored in the windows registry. 

A compile button will generate a PIC .asm file for subsequent assembly and "blowing". The compiled PIC code will be a simple sequencer. All the "tricky" CRC generation will be pre-calculated by the windows dialog based app.

The Signals:

Pin 17 (RA0) unused
Pin 18 (RA1) unused
Pin 1 (RA2) 57kHz
Pin 2 (RA3) data (Manchester differential)
Pin 3 (RA4) data rate clock (1.1875 kHz).

Port B <0..6> is assigned as a 7 bit DTA. Bit 6 MSB, bit 0 LSB.

Pin 13 <7> Unused 

Implementation notes:

Selection of crystal

57kHz * 256 = 14.592 MHz. This gives a straightforward division ratio. The instruction cycle time is 1/64 of 57 kHz, approximately 0.274 Ás.

Bernie's Hardware

Coding notes

Sequence generation

57 kHz Clock Instructions sequencer events data period 0  data period 1 Time us
OUT 1          
delay 8.77 Ás 32  Nothing Serialise and differentially encode Nothing   8.77
OUT 0          
delay 8.77 Ás 32  Update DTA  Update DTA  Update DTA  13.15
OUT 1          
delay 8.77 Ás 32  Nothing Manchester encode...
acquire data
Update data output to port
Manchester encode...
toggle data
Update data output to port
OUT 0          
delay 8.77 Ás 32  Toggle data rate clock Update clocks
Trigger DTA if transition
Update clocks
Trigger DTA if transition
OUT 1          
delay 8.77 Ás 32 Update DTA 
go to data period 1 : 8
Update DTA 
go to data period 1 : 8
Update DTA 
go to data period 1 : 8
OUT 0  0  0          
delay 8.77 Ás 32  Nothing Index Message store Index Message store  52.6 

16 of the above 96 instruction cycle sequences gives a data period of 0.842 ms.

RA4 data rate clock (1.1875 kHz). Rises 56 Ás after data transition for a generous set up time.

Interval Usage - Spaghetti code in style!

The above sequence has 4 "useful" code execution periods. In place of a couple of instruction to output the port B levels and 14 or so NOP's- we can do something more useful.

I'll notionally label the four 16 instruction intervals as phase 1 to phase 4. 

A series of events can now be pipelined. All events are, must, have got to be, no stupid arguments, precisely timed!

Phase 1 - Index Message store

Every eighth data period acquire the next byte from the message store. Oh yes, indexing 260 bytes of data in a PIC16F84 is a piece of piss!

Phase 2 - Serialise and differentially encode

Every data period, serialise the message store byte. Here we also differentially encode the bit.

Phase 3 - Manchester encode

Every half data period, that's 8 of the 19kHz sequences above, we Manchester Encode the differentially encoded data. This means for a differentially encoded bit value of '1' for the data period we send out a '1'  for the first half the period - then the inverse, a '0'. Conversely, for a differentially encoded bit value of '0' for the data period we send out a '0' for the first half the period - then the inverse, a '1'. 

The Manchester encoded differential data is presented to RB3. This allows a generous set-up time before the clock pulse generated in phase 4.

Phase 4 - Update Clocks, trigger DTA

The data rate and 2 * data rate clocks on Port B will be updated in this phase.

Present the data to the DTA via the cos (PI f td/4) filter on port B. 


We are not synthesising the dsbsc 57kHz sub-carrier. The PIC only generates the modulation for the sub-carrier.

RDS Message Store Generator

The application can be downloaded from here.

Set the fields and click generate. It will churn out something like:

                         ; PI c123
                         ; PS >G8OSH<
                         ; RT A message from Enjoy the intermod!
                         ; PTY 27 Oldies Music
                         ; Group 0B segment 0
                         ; c123 2bc 0b6c 10b c123 110 3e47 120
                         ; c1 23 af 02 db 10 bc 12 34 40 f9 1d 20 
        movlw 0xc1       ; 00
        call  sendita    ; compensate for the extra goto
        movlw 0x23       ; 01
        movlw 0x80       ; 10
        call  sendit
        movlw 0x80       ; 11
        call  sendit
        movlw 0xdc       ; 12
        call  sendit
        goto  loop_1

Each RDS group consists of 4 blocks of data and check word. These are concatenated in to a series of 13 bytes. 

Save the above generated .asm file as message.asm. This is then "#included" into the PIC rds timing generator source.

I spent some time fathoming out the formulae used in the data-channel spectrum shaping.

The Final Result

PIC DTA output

PIC DTA output.

10 kHz per division. We're better than -60dB up to 50 kHz.

Pilot Tone

Change the PIC firmware and we have a 19kHz pilot tone generator.

back to the RDS page

This page was last updated on the 18th January 2003